LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY zl5319 IS
  PORT(a,b:IN STD_LOGIC;
         s:IN STD_LOGIC;
         y:OUT STD_LOGIC
        );
END ENTITY zl5319;
ARCHITECTURE one OF zl5319 IS
  BEGIN
    PROCESS(a,b,s)
      BEGIN
        IF s='0' THEN
              y <= a;
         ELSE y <= b;
        END IF;
    END PROCESS;
END ARCHITECTURE one;
